Synapse Design Careers 2011 In India Recruitment job Opening vacancies For Chennai, France, US,Hyderabad & Pune Walkins Interview in Bangalore Opportunities for Commpensation & Benefits
Unparalleled opportunities & unmatched career paths across the world awaits talented individuals ready for a challenge in the following fields:
PHYSICAL DESIGN (3 - 12 years experience): place & Route, Clock Tree Synthesis, MMM optimization, IO Planning, Power Planning and Noise Analysis in technologies down to 22nm
DFT ENGINEERING (3 - 12 years experience): Scan insertion, MBIST, PBIST, JTAG, Test Vector generation experience.
Synthesis/STA ENGINEERING (3 - 12 years experience): Logical & Physical Synthesis, Constraint development, MMMCSTA signoff analysis
DESIGN & VERIFICATION (3 - 12 years experience); Verilog, System Verilog, OVM/VMM, Specman, Vera and Object oriented programming with good understanding of ARM based SOC Design. CPU Micro-Arch and Design verification; Cache and Memory subsystem, Power and Performance Modeling; Exposure to ISA and C/C++ or System Verilog
SW Engineers (3+ years experience): Linux driver Development; Android Multimedia, Graphics Framework; Camera/LCD/ HDMI/Display Driver Experience; Android Platform Expertise; BlueTooth Stack/Profile; Open-GL; QT, GTK+, Webkit, OpenMax, gStreamerVideo Post-Processing techniques for Multimedia applications.
Joining Bonus
A car as sign-on bonus, compensation best in the industry with exciting careerpath & attractive retention bonus is amongst many benefits we offer.
Unparalleled opportunities & unmatched career paths across the world awaits talented individuals ready for a challenge in the following fields:
PHYSICAL DESIGN (3 - 12 years experience): place & Route, Clock Tree Synthesis, MMM optimization, IO Planning, Power Planning and Noise Analysis in technologies down to 22nm
DFT ENGINEERING (3 - 12 years experience): Scan insertion, MBIST, PBIST, JTAG, Test Vector generation experience.
Synthesis/STA ENGINEERING (3 - 12 years experience): Logical & Physical Synthesis, Constraint development, MMMCSTA signoff analysis
DESIGN & VERIFICATION (3 - 12 years experience); Verilog, System Verilog, OVM/VMM, Specman, Vera and Object oriented programming with good understanding of ARM based SOC Design. CPU Micro-Arch and Design verification; Cache and Memory subsystem, Power and Performance Modeling; Exposure to ISA and C/C++ or System Verilog
SW Engineers (3+ years experience): Linux driver Development; Android Multimedia, Graphics Framework; Camera/LCD/ HDMI/Display Driver Experience; Android Platform Expertise; BlueTooth Stack/Profile; Open-GL; QT, GTK+, Webkit, OpenMax, gStreamerVideo Post-Processing techniques for Multimedia applications.
Joining Bonus
A car as sign-on bonus, compensation best in the industry with exciting careerpath & attractive retention bonus is amongst many benefits we offer.
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